1 of 9 022002 features fully compliant with scsi spi-2, spi-3, spi-4, ultra160, and ultra320 provides multimode low-voltage differential/single-ended (lvd/se) termination for nine signal-line pairs auto-selection of lvd or se termination 5% tolerance on se and lvd termination resistance low power-down capacitance of 3pf onboard thermal-shutdown circuitry scsi-bus hot-plug compatible fully supports actively negated se scsi signals pin assignment description the DS2118M ultra3 lvd/se scsi terminator is both a low-voltage differential (lvd) and single- ended (se) terminator. the multimode operation enables the designer to implement lvd in current products while allowing the end-user se-backward compatibility with legacy devices. if the device is connected in an lvd-only bus, the DS2118M will use lvd termination. if any se devices are connected to the bus, the DS2118M will use se termination. this is accomplished automatically inside the part by sensing the voltage on the scsi bus diffsens line. for the lvd termination, the DS2118M integrates two current sources with nine precision resistor strings. for the se termination, one regulator and nine precision-110 ? resistors are used. three DS2118M terminators are needed for a wide scsi bus. reference documents small computer systems interface (scsi-3) scsi parallel interface (spi) project: 0855-m, 1995 small computer systems interface (scsi-3) scsi parallel interface 2 (spi-2) project: 1142-m, 1998 small computer systems interface (scsi-3) scsi parallel interface 3 (spi-3) project: 1302-d, 1999 small computer systems interface (scsi-3) scsi parallel interface 4 (spi-4) project: 1365-d, 200x available from: american national standards institute (ansi) phone: (212) 642-4900 global engineering documents 15 inverness way east; englewood, co 80112 phone: (800) 854-7179 32 35 34 33 31 30 29 28 27 26 25 24 lvd se r9n r8n r8p hs gnd hs gnd hs gnd r7n r7p r6n r9p nc r1p r1n r2n hs gnd hs gnd r3p r3n r4p r4n r2p DS2118Mb 36-pin ssop 36 23 vref nc tpwr hvd hs gnd 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 22 21 20 19 r5p r5n iso gnd diff_cap diffsense mstr/slv r6p DS2118M ultra3 lvd/se scsi terminato r www.maxim-ic.com
DS2118M 2 of 9 functional description the ds2118 combines lvd and se termination with diffsense sourcing and detection. a bandgap reference is fed into two amplifiers, which creates a 1.25v reference voltage and a 2.85v reference voltage. the control logic determines which of these references will be applied to the termination resistors. if the scsi bus is in lvd mode, then the 1.25v reference will be used. if the scsi bus is in se mode, then the 2.85v reference will be used. that same control logic will switch in/out parallel resistors to change the total termination resistance accordingly. finally, in se mode the rp pins will be switched to ground. the diffsense circuitry decodes trinary logic. there will be one of three voltages on the scsi control line called diffsens. two comparators and a nand gate determine if the voltage is below 0.6v, above 2.15v, or in between. that indicates the mode of the bus to be hvd, se, or lvd, respectively. the DS2118M?s diff_cap pin monitors the diffsens line to determine the proper operating mode of the device; this mode is indicated by the se/lvd/hvd outputs. the diffsense pin can also drive the scsi diffsens line (when mstr/slv = 1) to determine the scsi bus operating mode. the DS2118M switches to the termination mode that is appropriate for the bus based on the value of the diffsens voltage. these modes are: lvd mode: lvd termination is provided by a precision laser-trimmed resistor string with two amplifiers. this configuration yields a 105 ? differential and 150 ? = common-mode impedance. a fail-safe bias of 112mv is maintained when no drivers are connected to the scsi bus. se mode: when the external driver for a given signal line turns off, the active terminator will pull that signal line to 2.85v (quiescent state). when used with an active negation driver, the power amp can sink 22ma per line while keeping the voltage reference in regulation. the terminating resistors maintain their 110 ? = value. hvd isolation mode: the DS2118M identifies that there is an hvd (high-voltage differential) device on the scsi bus and isolates the termination pins from the bus. when iso is pulled high, the termination pins are isolated from the scsi bus, v ref remains active, and the bus mode indicators (se/lvd/hvd) remain active. during thermal shutdown, the termination pins are isolated from the scsi bus, v ref becomes high impedance, and the bus mode indicators (se/lvd/hvd) remain active. the diffsense driver is shut down during either of these two events. an internal pulldown resistor assures that the DS2118M will be terminating the bus if the iso pin is left floating. to ensure proper operation, the tpwr pin should be connected to the scsi bus termpwr line. as with all analog circuitry, the termpwr and v dd lines should be bypassed locally. a 2.2 f capacitor and a 0.01 f high-frequency capacitor is recommended between tpwr and ground and placed as close as possible to the DS2118M. the DS2118M should be placed as close as possible to the scsi connector to minimize signal and power-trace length, thereby resulting in less input capacitance and reflections, which can degrade the bus signals.
DS2118M 3 of 9 to maintain the specified regulation, a 4.7 f capacitor is required between the v ref pin (vref) and ground of each DS2118M. a high frequency cap (0.1 f ceramic recommended) can also be placed on the v ref pin in applications that use fast rise/fall time drivers. a typical scsi bus configuration is shown in figure 2. notes: 1) diffsens. refers to the scsi bus signal. 2) diffsense. refers to the DS2118M pin name and internal circuitry capable of driving the diffsens line. 3) diff_cap. refers to the DS2118M pin name and internal circuitry relating to monitoring the diffsens line.
DS2118M 4 of 9 figure 1. DS2118M block diagram
DS2118M 5 of 9 figure 2. scsi bus configuration
DS2118M 6 of 9 table 1. pin description pin symbol description 1 vref reference voltage. 2.85v reference in se mode and 1.25v reference in lvd mode; must be decoupled with a 4.7f cap. 2, 3 nc no co nnect. do not connect these pins. 4 ? 7, 11 ? 16, 22 ? 25, 29 ? 32 rxp, rxn signal termination. connect to scsi bus signal lines. 8, 10, 26, 9, 28, 27 hs gnd heat sink ground. internally connected to the mounting pad. should be grounded. 17 iso isolation. when pulled high, the DS2118M isolates its bus pins (rxp, fxp) from the scsi bus. 18 gnd ground. signal ground; 0v. 19 mstr/slv master/slave. mode - select for the noncontrolling terminator. when pulled high (mstr), the diffsense driver is enabled. 20 diffsens e diffsense. output to drive the scsi bus diffsens line. 21 diff_cap diffsense capacitor. connect 0.1f capacitor for diffsense filter. input to detect the type of device (differential or single - ended) on the scsi bus. 33 se single - ended. se output of di ffsense receiver; indicates se bus operation. 34 lvd low - voltage differential. lvd output of diffsense receiver; indicates lvd bus operation. 35 hvd high - voltage differential. hvd output of diffsense receiver; indicates hvd bus operation or thermal shutd own. 36 tpwr termination power. connect to the scsi termpwr line and decouple with 2.2f capacitor. recommended operating conditions parameter symbol min typ max units notes termpower voltage se mode lvd mode v tpwr (se) v tpwr (lvd) 4 .0 2.7 5.5 5.5 v v logic 0 v il - 0.3 +0.8 v logic 1 v ih 2.0 v tpwr + 0.3 v operating temperature v amb 0 70 c
DS2118M 7 of 9 single-ended characteristics parameter symbol min typ max units notes se termination resistance r se 104.5 110 115.5 ? 1 se voltage reference v ref 2.7 3.0 v se output current l ose 25.4 ma 2 output capacitance c out 3 pf 3 low-voltage differential characteristics parameter symbol min typ max units notes differential mode termination resistance r dm 100 110 ? common mode termination resistance r cm 110 190 ? differential mode bias v dm 100 125 mv 4 common mode bias v cm 1.125 1.375 v dc characteristics parameter symbol min typ max units notes termpower current i tpmr 12 ma 4 input leakage high i ih -1.0 a input leakage low i il 1.0 a output current high i oh -1.0 ma 5, 7 output current low i ol 4.0 ma 6, 7 diffsens se operating range v seor -0.3 0.5 v diffsens lvd operating range v lvdor 0.7 1.9 v diffsens hvd operating range v hvdor 2.4 v tpwr + 0.3 v diffsense driver output voltage v dso 1.2 1.4 v 8, 9 diffsense driver source current i dsh 5 15 ma 8, 10, 12 diffsense driver sink current i dsl 20 200 a 8, 11 thermal shutdown 150 oc 3
DS2118M 8 of 9 regulator characteristics parameter symbol min typ max units notes line regulation li reg 1.0 2.5 % load regulation lo reg 1.3 3.5 % current limit i lim 550 ma sink current i sink 200 ma notes: 1) v line = 0v to 3v. 2) v line = 0.2v. 3) guaranteed by design. 4) all lines open. 5) v out = 2.4v. 6) v out = 0.4v. 7) se/lvd/hvd pins only. 8) mstr/slv = 1. 9) i ds = 0ma to 5ma. 10) v dso = 0v. 11) v dso = 2.75v. 12) tpwr = 5.5v.
DS2118M 9 of 9 DS2118M 36-pin ssop package pkg 36-pin dim min max a mm 2.44 2.64 a1 mm 0.12 - b mm 0.29 0.43 c mm 0.23 0.32 d mm 15.20 15.54 e mm 10.11 10.52 e1 mm 7.40 7.60 e mm 0.80 bsc h mm 0.25 0.71 l mm 0.51 1.02 notes: 1) dimensions d and e1 include mold mismatch, but do not include mold flash, protrusions, or gate burrs. mold flash, protrusions, or gate burrs shall not exceed 0.254mm per side. 2) section a-a dimensions apply to the flat section of the lead between 0.13mm to 0.25mm from the lead tip. 3) the chamfer on the body is optional. if it is not present, a visual index feature must be located within the cross- hatched area.
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